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il600 series isoloop ? is a registered trademark of nve corporation. *u.s. patent number 5,831, 426; 6,300,617 and others. rev. v nve corporation 11409 valley view road, eden prairie, mn 55344-3617 phone: (952) 829- 9217 fax: (952) 829-9189 www.isoloop.com ?nve corporation passive-input digital isolators ? cmos outputs functional diagrams out 1 v oe out 1 out 2 out 1 in 2 out 1 out 2 out 3 in 1 in 1 in 2 in 1 out 2 in 1 in 2 in 3 v dd1 v dd2 il610 il611 il612 il613 il614 out 1 in 2 in 3 in 1 out 2 out 3 coil v oe features ? up to 100 mbps data rate ? single-ended or differential input operation ? flexible inputs with very wide input voltage range ? failsafe output (logic high output for zero coil current) ? output enable (il610) ? 3.3 v or 5 v operation / level translation ? 2500 v rms isolation (1 minute) ? low power dissipation ? ? 40c to 85c temperature range ? 20 kv/s transient immunity ? low emc footprint ? ul1577 and iec61010-2001 approved ? 8-pin msop, soic, and pdip packages ? bare die available (il610) applications ? can bus / device net ? differential line receiver ? optocoupler replacement ? spi interface ? rs-485, rs-422, or rs-232 ? digital fieldbus ? space-critical multi-channel applications description the il600 series are passive input digital signal isolators with cmos outputs. they have a similar interface but better performance and higher package density than optocouplers. the devices are manufactured with nve?s patented* isoloop ? spintronic giant magnetoresistive (gmr) technology for small size, high speed, and low power. a single resistor sets the maximum input current for voltages above 0.5 v. a capacitor in parallel with the current-limit resistor provides improved dynamic performance. these versatile components si mplify inventory requirements by replacing a variety of optocouplers and functioning over a wide range of data rates, edge speeds, and power supply levels. the devices are available in msop, soic, and pdip packages, as well as bare die.
il600 series 2 absolute maximum ratings (1) parameters symbol min. typ. max. units test conditions storage temperature t s ? 55 150 c ambient operating temperature t a ? 55 125 c supply voltage v dd ? 0.5 7 v dc input current i in ? 25 25 ma ac input current (single-ended input) i in ? 35 35 ma ac input current (differential input) i in ? 75 75 ma output voltage v o ? 0.5 v dd +1.5 v maximum output current i o ? 10 10 ma esd 2 kv hbm note 1: operating at absolute maximum ratings will not damage the devi ce. parametric performance is not guaranteed at absolute maximum ratings. recommended operating conditions parameters symbol min. typ. max. units test conditions ambient operating temperature t a ? 40 85 c supply voltage v dd 3.0 5.5 v input current low i in l ow 5 10 ma input current high i in h igh ? 10 0.5 ma differential input current low i in l ow 5 60 ma differential input current high i in h igh ? 60 ? 5 ma current flow direction defined as positive when flowing into the coil ? terminal and out coil+ output current i out ? 4 4 ma common mode input voltage v cm 400 v rms insulation specifications parameters symbol min. typ. max. units test conditions creepage distance (mm) msop 3.01 mm 0.15'' soic 4.03 mm 0.3'' soic 8.08 mm 0.3'' pdip 7.08 mm internal isolation distance 9 m leakage current 0.2 a 240 v rms , 60 hz barrier impedance >10 14 ||7 ? || pf rated voltage (1 minute; msop) v iso 1,000 v ac 50 hz to 60 hz rated voltage (1 min.; soic & pdip) v iso 2,500 v ac 50 hz to 60 hz safety and approvals iec61010-2001 tuv certificate numbers: n1502812, n1502812-101 classification: reinforced insulation model package pollution degree material group max. working voltage il610-2e, il611-2e, il612-2e pdip ii iii 300 v rms il613e, il614e soic (0.3") ii iii 300 v rms il610-3e, il611-3e, il612-3e, il613-3e, il614-3e soic (0.15") ii iii 150 v rms ul 1577 component recognition program file number: e207481 rated 2,500v rms for 1 minute (soic, pdip) soldering profile per jedec j-std-020c electrostatic discharge sensitivity this product has been tested for electrostatic sensitivity to th e limits stated in the specifica tions. however, nve recommends that all integrated circuits be handled with appropriate care to avoid damage. damage caused by inappropriate handling or storage could range from performance degradation to complete failure.
il600 series 3 il610 pin connections 1 nc no internal connection 2 in+ coil connection 3 in ? coil connection 4 nc no internal connection 5 gnd ground return for v dd 6 out data out 7 v oe output enable. internally held low with 100 k ? 8 v dd supply voltage il610 il611 pin connections 1 in 1 + channel 1 coil connection 2 in 1 ? channel 1 coil connection 3 in 2 + channel 2 coil connection 4 in 2 ? channel 2 coil connection 5 gnd ground return for v dd 6 out 2 data out, channel 2 7 out 1 data out, channel 1 8 v dd supply voltage il611 il612 pin connections 1 in 1 data in, channel 1 2 v dd 1 supply voltage 1 3 out 2 data out, channel 2 4 gnd 1 ground return for v dd1 5 gnd 2 ground return for v dd2 6 in 2 data in, channel 2 7 v dd 2 supply voltage 2 8 out 1 data out, channel 1 il612 il613 pin connections 1 in 1 + channel 1 coil connection 2 nc no connection (internally connected to pin 8) 3 in 1 ? channel 1 coil connection 4 in 2 + channel 2 coil connection 5 in 2 ? channel 2 coil connection 6 in 3 + channel 3 coil connection 7 in 3 ? channel 3 coil connection 8 nc no connection (internally connected to pin 2) 9 gnd ground return for v dd (internally connected to pin 15) 10 out 3 data out, channel 3 11 nc no connection 12 v dd supply voltage. pin 12 and pin 16 must be connected externally 13 out 2 data out, channel 2 14 out 1 data out, channel 1 15 gnd ground return for v dd (internally connected to pin 9) 16 v dd supply voltage. pin 12 and pin 16 must be connected externally il613 note: pins 12 and 16 must be connected externally. nc v dd in+ v oe in- out nc gnd in 1 +v dd in 1 - out 1 in 2 + out 2 in 2 - gnd in 1 +v dd nc gnd* in 1 - out 1 in 2 + out 2 in 2 - v dd in 3 + in 3 - nc out 3 nc gnd in 1 out 1 v dd1 v dd2 out 2 in 2 gnd 1 gnd 2
il600 series 4 il614 pin connections 1 v dd1 supply voltage 1 2 gnd 1 ground return for v dd1 (internally connected to pin 8) 3 out 1 data out, channel 1 4 re channel 1 data output enable. internally held low with 100 k ? 5 in 2 data in, channel 2 6 v coil supply connection for channel 2 and channel 3 coils 7 in 3 data in, channel 3 8 gnd 1 ground return for v dd1 (internally connected to pin 2) 9 gnd 2 ground return for v dd2 (internally connected to pin 15) 10 nc no connection 11 out 3 data out, channel 3 12 v dd2 supply voltage 2 13 out 2 data out, channel 2 14 in 1 + coil connection 15 gnd 2 ground return for v dd2 (internally connected to pin 9) 16 in 1 ? coil connection il614 v dd1 in 1 - gnd 1 gnd 2 out 1 in 1 + re out 2 in 2 v dd2 v coil in 3 nc out 3 gnd 1 gnd 2
il600 series 5 electrical specifications electrical specifications are t min to t max and 4.5 v to 5.5 v unless otherwise stated. parameters symbol min. typ. max. units test conditions coil input impedance z coil 85||9 ? ||nh t amb = 25c v dd = 3.0 v to 5.5 v temperature coefficient of coil resistance tc r coil 0.2 0.25 ? /c v dd = 3.0 v to 5.5 v input threshold for output logic high i inh 0.5 1 ma single or differential v dd = 3.0 v to 5.5 v input threshold for output logic low i inl 5 3.5 ma single or differential v dd = 3.0 v to 5.5 v quiescent current il610, i dd il611, i dd il612, i dd1 il612, i dd2 il613, i dd il614, i dd1 il614, i dd2 2 4 2 2 6 2 4 3 6 3 3 9 3 6 ma ma ma ma ma ma ma v dd = 5 v, i in = 0 4.9 5 v v dd = 5 v, i o = 20 a logic high output voltage v oh 4.0 4.8 v dd = 5 v, i o = 4 ma 0 0.1 v v dd = 5 v, i o = ? 20 a logic low output voltage v ol 0.2 0.8 v dd = 5 v, i o = ? 4 ma logic output drive current |i o | 7 10 ma i fs-high ? 25 0.5 ma failsafe operation input current (1) i fs-low 5 25 ma see test circuit 1 switching specifications at 5v input signal rise and fall times t ir , t if 1 s see test circuit 1 data rate 100 mbps see test circuit 1 minimum pulse width (2) pw 10 ns see test circuit 1 propagation delay input to output (high-to-low) t phl 8 15 ns see test circuit 1 propagation delay input to output (low to high) t plh 8 15 ns see test circuit 1 average propagation delay drift t plh 10 ps/c pulse width distortion |t phl ? t plh | (3) pwd 3 5 ns see test circuit 1 pulse jitter (4) t j 100 ps see test circuit 1 propagation delay skew (5) t psk ? 2 2 ns see test circuit 1 output rise time (10?90%) t r 2 4 ns see test circuit 1 output fall time (10?90%) t f 2 4 ns see test circuit 1 common mode transient immunity |cm h |,|cm l | 15 20 kv/ s v t = 300 v peak notes: 1. failsafe operation is defined as the gua ranteed output state which will be achieved if the dc input current falls between th e input levels specified (see test circuit for details). 2. minimum pulse width is the shortest pulse width at which the specified pwd is guaranteed. 3. pwd is defined as | t phl ? t plh |. 4. 66,535-bit pseudo-random binary signal (prbs) nrz bit pattern w ith no more than five consecutive 1s or 0s; 800 ps transition time. 5. t psk is equal to the magnitude of the worst case difference in t phl and/or t plh that will be seen between units at 25c.
il600 series 6 electrical specifications are t min to t max and 3.0v to 3.6v unless otherwise stated. parameters symbol min. typ. max. units test conditions quiescent current il610, i dd il611, i dd il612, i dd1 il612, i dd2 il613, i dd il614, i dd1 il614, i dd2 1.3 2.6 1.3 1.3 4 1.3 2.6 2 4 2 2 6 2 4 ma ma ma ma ma ma ma v dd = 3.3 v, i in = 0 3.2 3.3 v v dd = 3.3 v, i o = 20 a logic high output voltage v oh 3.0 3.1 v dd = 3.3 v, i o = 4 ma 0 0.1 v v dd = 3.3 v, i o = ? 20 a logic low output voltage v ol 0.2 0.8 v dd = 3.3 v, i o = ? 4 ma logic output drive current |i o | 7 10 ma i fs-high ? 25 0.3 ma failsafe operation input current (4) i fs-low 8 25 ma see test circuit 1 switching specifications at 3.3v input signal rise and fall times t ir , t if 1 s see test circuit 1 data rate 100 mbps see test circuit 1 minimum pulse width (1) pw 10 ns see test circuit 1 propagation delay input to output (high to low) t phl 12 18 ns see test circuit 1 propagation delay input to output (low to high) t plh 12 18 ns see test circuit 1 average propagation delay drift t plh 10 ps/c pulse width distortion |t phl ? t plh | (2) pwd 3 5 ns see test circuit 1 propagation delay skew (3) t psk ? 2 2 ns see test circuit 1 output rise time (10?90%) t r 3 5 ns see test circuit 1 output fall time (10?90%) t f 3 5 ns see test circuit 1 common mode transient immunity |cm h |,|cm l | 15 20 kv/ s v t = 300 v peak notes: 1. the minimum pulse width is the shortest pulse width at which the specified pwd is guaranteed. 2. pwd is defined as | t phl ? t plh |. 3. t psk is equal to the magnitude of the worst case difference in t phl and/or t plh that will be seen between units at 25c. 4. failsafe operation is defined as the gua ranteed output state which will be achieved if the dc input current falls between th e input levels specified (see test circuit 1 for details). note if fa ilsafe to logic low is required, the dc cu rrent supplied to the coil must be at lea st 8 ma using 3.3 v supplies versus 5 ma for 5 v supplies. select the value of limit resistor appropriately.
il600 series 7 test circuits the test circuits below were used to obtain the specifications on the previous pages. in differential mode, the boost capacitor is generally not required, but it may be used to increase external magnetic field immunity or improve pwd performance as required. +v v dd gnd 1 gnd 2 3 2 5 6 7 8 - + 1k 15 pf 10 nf r limit c boost gnd 11 2 1k il610 +v v dd gnd 1 gnd 2 3 2 5 6 7 8 - + 1k 15 pf 10 nf gnd 11 2 1k il610 r limit test circuit 1 (single-ended) test circuit 2 (differential) operation il600-series isolators are current mode devices. changes in current flow into the input coil result in logic state changes at the output. one of the significant advantages of the passive coil i nput is that both single ended and differential inputs can be ha ndled without reverse bias protection. the gmr sensor switches the output to logic low if current flows from (in ?) to (in+). resistors set the coil input current to the 5 ma minimum. there is no lim it to input voltages because there are no semiconductor input structures. the absolute maximum current through the coil of the il600-series is 25 ma dc, or 75 ma in differential mode. the worst-case logic low threshold current is 5 ma. while typical threshold currents are actually less, nve recommends 5 ma logic low thresholds as a minimum design value. in all cases, the current must flow from in ? to in+ in the coil to switch the output low. this is the case for true or inverted data, in single-ended or diffe rential configurations. output logic high is the zero input curr ent state. note that current flowing from coil+ to coil- (negative current in the specifications) will push the gmr sensor further into th e high state. figure 1 shows the response of the il600-series. the gmr bridge structure is designed so the output of the isolator is logic hi gh with no signal present. the output will switch to the low state with approximately 3.5 ma of coil current, and switch back to t he high state when the input curre nt falls below 1.5 ma. this allows glitch -free interface with low slew rate signals. to calculate the value of the protection resistor (r1), use ohm?s law as shown in the examples below. note that only the magnitude of the voltage across the coil is important; the absolute values of v inh and v inl are arbitrary.
il600 series 8 calculating limiting resistor value example 1 . in this case, t nom = 25oc, v in high = 24v, v in low = 1.8v, r coil =85 ? and i coil minimum is specified as 5 ma. total loop resistance is: (r1+r coil ) = (v inh ? v inl ) = 22.2 ? = 4440 ? i coil 0.005 therefore: r1 = 4440 ? ? 85 ? = 4355 ? example 2 . at a maximum operating temperature of 85c: t max = 85oc, t nom = 25oc, v in high = 5 v, v in low = 0 v, and nominal r coil = 85 ? . at t max = 85oc: r coil = 85 + (t max ? t nom ) x tcr coil = 85 + (85 ? 25) x 0.2 = 85 + 12 = 97 ? therefore, the recommended series resistor is: r1 = (v inh ?v inl ) ? r coil i coil r1 = (5 ?0) ? 97 = 903 ? 0.005 allowance should also be made for the temperature coefficient of the current limiting resistor to ensure that i coil is at least 5 ma at the maximum operating temperature. 3.5 5 high low logic state coil current ma 1.5 t t figure 1. il600-series transfer function v inh v inl i coil r1 85 input coil figure 2. limiting resistor calculation equivalent circuit
il600 series 9 2500 16 5000 3 500 1000 signal rise/fall time (ns) c boost (pf) 2500 16 5000 3 500 1000 signal rise/fall time (ns) c boost (pf) failsafe operation internal failsafe biasing ensures the output will always switch to the high state if th e input coil is open-circuit. this is true for either 5 v or 3.3 v output supplies. the specifications on pages 5 and 6 show the enhanced failsafe conditions available with t he il600-series isolators that cove r the non-open circuit condition. the output will re main in the state sp ecified, or will switch to that state, if the specified current is flowing in the coil. note that positive values of current mean current flow into the in ? input (pin 3 in test circuit 1). single-ended or differential input the il610, il611, il613, and channel 1 of the il614 can be run w ith single-ended or differential inputs. in differential mode, coil current reverses each cycle. in single-ended mode, a ?boost capacitor? placed acr oss the current limit resistor provides pulsed current reversal for correct ope ration. in the differential mode, current will naturally flow through the coil in both directio ns without the boost cap, although the cap can still be used if application factors such as increased external field immunity or improved pwd performance mandate. absolute maximum recommended coil current in single-ended mode is 25 ma while differential mode allows up to 75 ma to flow. the difference in specifications is due to the risk of electromigration of coil metals under constant current flow. in single ended mode, long-term dc current flow above 25 ma can cause erosion of the coil metal (rather like river flow does to its banks). in differential mode, erosion takes place in both directions as each current cycle reverses and has a net effect of zero up to the fuse current. a current of more than 100 ma w ill cause the coil to irreparably fuse open . there are many applications where the differential option can be very useful. one advantag e over optocouplers and other high- speed couplers is that no reverse bias protection for the input structure is required for a differential signal. this reduces c ost and complexity. one of the more common applications is for an isol ated differential line receiver. for example, rs-485 can drive an il610 directly for a fraction of the cost of an isolated rs-485 node (see illustrative applications section). typical resistor values the table shows typical values for the external resistor in 5 v and 3 v logic systems. as always, these values as approximate and should be adjusted for temperature or other application specifics if th e expected temperature range is large, 5% or even 1% tolerance resistors may provide additional design margin. alternatively, see the applications information section for circuit ideas allowing more generalized resistor selection. boost capacitor the boost capacitor in parallel with the current-limiting resistor boosts the instantaneous coil current at the signal transition. the boost pushes the gmr bridge output through the comparator threshold voltage with less propagation delay and pulse width distortion. the instantaneous boost capacitor current is proportional to input edge speeds ( ). select a capacitor value based on the rise and fall times of the input signal to be isolated that provides approximately 20 ma of additional ?boost? current. figure 3 is a guide to boost capacitor selection. for standard logic signals (t r ,t f < 10 ns), a 16 pf capacitor is recommended. the capacitor value is ge nerally not critical, and can often vary 50% with little noticeable difference in device performance. dynamic power consumption power consumption is proportional to duty cycle, not data ra te. the use of nrz coding minimizes power dissipation since no additional power is consumed when the output is in the high state. in differential mode, where the logic high condition may sti ll require a current to be forced through the coil, power consump tion will be higher than a typical nrz single ended configuration. power supply decoupling 47 nf ceramic capacitors are recommended to decouple the power supplies. the capacitors should be placed as close as possible t o the appropriate v dd pin for optimal output wave shaping. v coil 0.125w, 10% resistor 3.3 v 560 ? 5 v 910 ? figure 3. c boost selector dv dt c
il600 series 10 applications information il600-series isolators are current mode devices. this means that a current of a certain magnitude and direction must flow in th e input coil to change the output logic state. figure 4 shows a simplified transfer curve for a typical il600-series data channel . the transfer function for this device is approximately linear. an applied coil input current creates a magnetic field that causes the gmr bridge output to change in proportion to the applied field. the gmr bridge is connected to a comparator. when the bridge output is greater than the comparator high threshold level, the output will go high. similarly, when the bridge output is less than the comparator low threshold, the output will go low. the ?window of operation? shown in figure 4 highlights the specified corners of device operation. an input current of approximately ? 3.5 ma or ? 1.5 ma will cause the device to hover around the comparator switching th resholds producing an unstable output. for single-ended operation across the entire temperature range and power supply range, the magnitude of the co il current for a logic low should be at least ? 5 ma, and the magnitude of the coil current for a logic high should be between ? 0.5 ma and 0 ma. the stated direction of the curre nt is negative in figure 4 because the magne tic field is negative with respect to ea rth field. current is always fed into the in ? terminal of an il600-series device. since these currents are actually sourced, not sunk by the user, the specified currents are quoted as positive values in the electrical specifications section of this data sheet. when designing circuits using digital logic, most designers are aware that the input to a logic gate is differential with respe ct to ground. separate ground layers, star points or planes usually need to be designed into circuit boards with fast switching curre nts to reduce ground voltage bounce caused by inductance in ground returns. ground error voltages can cause data errors in high-speed circuits due to their impact on the effective logic threshold vo ltage at any given instant. similarly, when using il600-series devices, the designer should be aware that it is the voltage magnitude across the coil that creates the current, not just the value of the input voltage. to illustrate th is point, consider the single-ende d non-inverting and inverting cases. coil current (ma) bridge o/p (mv) comparator lo w threshold comparator high threshold -7 -6 -5 -4 -3 -2 -1 0 -10 -9 -8 -40 -20 60 40 20 10 5 window of operation -60 bridge output response figure 4. il600-series transfer function
il600 series 11 in the non-inverting circuit, the in ? terminal is connected via a 1 k? current-limiting resistor to the supply rail, and the input is connected to the in+ terminal. assume the supply voltage is +5 v and the input signal is a 5 v cmos signal. a 1 k ? resistance is selected to limit the coil current to 5 ma. for the purpose of this illustration we will ignore the coil resistance. when a logic high (+5 v) is applied to the input, the current through the coil is zero. when the input is a logic low (0 v), approximately 5 ma flows through the coil from the in ? side to the in+ side. figure 4 shows that the device will transition to both logic states easily unde r these conditions. now assume that the 5 v rail is at 5.5 v and the cmos input signal is loaded so that its high level is only 4.5 v. when a logic high (4.5 v) appears on the input, there is still a current of ? 1ma flowing through the coil. figure 4 shows that the device is getting close to the off-state threshold of ? 1.5 ma, and now exceeds the specification of ? 0.5 ma for this logic level. some intermittent operation or complete non-function should be expected in this case. the designer must ensure that the difference between the logic high voltage and the power supply voltage is such that the residual current in the coil is lower than 0.5 ma. the inverting configuration design problem is similar to the problems associated w ith standard logic. in the inverting configuration, the signal into the coil is differential with respect to ground. the designer must ensure that the diffe rence between the logic low voltage and the coil ground is such that the residual coil current is less than 0.5 ma. conventional ground bounce design precautions apply. the il612 and il614 devices have some inputs that do not offer inverting operation. the il612 coil in ? input is hardwired internally to the device power supply; therefore it is important to ensure the isolator power supply is at the same voltage as the power supply to the source of the input logic signal. the il614 has a common coil in ? for two inputs. this pin should be connected to the power supply for the logic driving channels 2 a nd 3, and the channels run should be run in non-inverting mode. il600 devices are simple to use as long as it is remembered that there must be enough coil current (5 ma) to ensure logic low output, and close to zero current (0.5 ma to 0 ma) to ensure logic high output. v dd gnd 2 5 6 7 8 note. c 1 is 47 nf ceramic. non-inverting circuit data out c 1 1 +5 v gnd 1 1k 3 2 data in c boost il610 - + +5 v v dd gnd 1 gnd 2 1k 3 2 5 6 8 note. c 1 is 47 nf ceramic. il610 inverting circuit - + data in data out 7 c 1 c boost figure 5. inverting and non-inverting circuits
il600 series 12 electromagnetic compatibility and magnetic field immunity because il600-series isolators are comple tely static, they have the lowest em itted noise of any non-optical isolators. isoloop devices operate by imposing a magnetic field on a gmr sensor, which translates the change in field into a change in log ic state. there are several ways of enhancing magnetic field imm unity. the devices are manufactured with a magnetic shield above the sensor. the shield acts as a flux concentrator to boost the magnetic signal from the internal coil, and as a shield against external magnetic fields. the shield absorbs surroundi ng stray flux until it becomes saturated. at saturation the shie ld is transparent to external applied fields, and the gmr sens or may react to the field. to compensa te for this effect, isoloop isolators use wheatstone bridge structures that are only sensitive to differential magnetic fields. providing a larger internal field will reduce the effect of an external field on the gmr sensor. immunity to external magnetic fields can also be enhanced by proper orientation of the device with respect to the field directi on, the use of differential signaling, and field boosting capacitors. two ways to enhance immunity to exte rnal magnetic field are summarized below. 1. orientation of the device with respect to the field direction an applied field in the ?h1? direction is the worst case for magnetic immunity. in this case the external field is in the same direction as the applied internal field. in one direction it will tend to help switching; in the other it will hinder switching. this can cause unpredictable operation. an applied field in direction ?h2? has considerably less effect and results in higher magnetic immunity. nc v dd in+ v oe in- out nc gnd 2. differential signaling and boost capacitors regardless of orientation, driving the co il differentially improves magnetic immunity. this is because the logic high state is driven by an applied field instead of zero field, as is the case with single-ended operation. the higher the coil current, the higher the internal field, and the higher the immunity to external fields. optimal magnetic immunity is achieved by adding the boost capacitor. method approximate immuni ty immunity description field applied in h1 direction 20 gauss a dc current of 16 a flowing in a conductor 1 cm from the device could cause disturbance. field applied in h2 direction 70 gauss a dc current of 56 a flowing in a conductor 1 cm from the device could cause disturbance. field applied in any direction but with field booster capacitor (16 pf) in circuit 250 gauss a dc current of 200 a flowing in a conductor 1 cm from the device could cause disturbance. data rate and magnetic field immunity it is easier to disrupt an isolated dc signal with an external magnetic field than it is to disrupt an isolated ac signal. simi larly, a dc magnetic field will have a greater effect on the device than an ac magnetic field of the same effective magnitude. for example, signals with pulses greater than 100 s long are more susceptible to magnetic fields than shorter pulse widths. h1 h2
il600 series 13 illustrative applications gnd 2 v dd2 b isl8485 d 47nf v dd1 gnd 1 3 2 5 6 7 8 4 5 7 2 1 - + il610 r re a 8 6 1 r 47nf gnd 3 v dd2 z isl8490 d 47 nf v dd1 gnd 1 3 2 5 6 7 8 3 4 6 47 nf 1 - + il610 r re y 1 5 2 3 5 6 7 8 + - il610 r re 47 nf v dd3 gnd 2 17r 17r isolated rs-485 and rs-422 receivers using il610s il610s can be used as simple isolated rs-485 or rs-422 receivers, terminating signals at the il610 for a fraction of the cost of an isolated node. cabling is greatly simplified by eliminating the need to power the input si de of the receiving board. no current-limiting resistor is needed for a single receiver becau se it will draw less curre nt than the driver maximum. current limiting resistors allow at least eight nodes without exceeding the maximum load of the transceiver chip. placem ent of the current-limiting resistors on both lines provides better dynamic signal balance. th ere is generally no need for line termination resistors below data rates of approximately 10 mbps because the il610 coil resistance of approximately 85 ? is close to the characteristic impeda nce of most cables. the circuit is intrinsically open circuit failsaf e because the il610 is guaranteed to switch to the high state when the coil input current is less than 500 a. number of nodes current limit resistors ( ? ) 1 none 2 17 3 22 4 27 5 27 6 27 7 30 8 30
il600 series 14 sja1000 pca82c250 1 2 3 4 5 6 7 8 rs canh canl vref txd gnd vcc rxd 1 2 3 4 5 6 14 13 12 8 15 18 19 20 21 22 v ss3 v ss2 v ss1 v dd3 v dd2 v dd1 tx0 tx1 rx1 rx0 v dd2 v dd1 gnd 2 gnd 1 c 6 c 5 c 4 c 3 c 2 c 1 rs 1k 1k c boost c boost 7 8 4 notes: c boost is 16 pf ceramic all other capacitors are 47 nf ceramic v dd1 v dd2 il612 isolated can bus low pulse width distortion is critical for can bus, and il600 isolators are specified for just 3 ns typical pulse width distort ion. their fail-safe output (logic high output for zero coil current) ensures proper power-on. the speed of il600 isolators easily supports the maximum can bus transfer speed of 1 mbps.
il600 series 15 gnd 2 gnd 1 v dd2 v dd1 a b 1 2 4 3 5 6 8 7 390r 390r 220r isl8487e r re de d c 3 1 2 3 4 5 6 7 89 10 11 12 13 14 15 16 c 1 c 2 1k 1k d de r re - - + + - + c boost c boost c boost re il614 notes: c boost is 16 pf all other capacitors are 47 nf ceramic isolated rs-485 ? fractional load the unique il614 three-channel isolator can be used as part of a multi-chip design with a variety of non-isolated transceivers. the il614 provides 2.5 kv rms isolation (1 minute) and 20 kv/s transient immunity. the il614-3 is in a narrow-body (0.15 inch-wide) package when board space is critical. c boost is 16 pf ceramic . all other capacitors are 47 nf ceramic n otes: c boost is 16 pf all other capacitors are 47 nf ceramic
il600 series 16 - + - + 3 2 3 2 1k 1k il610 lm309h ir2102 5 6 8 8 6 5 1 2 3 45 6 7 8 +5 v 10-20 v 600 v max. 1 2 3 lin hi-drive lo-drive to load c 1 c 2 hin ho lo v s v cc v b com gnd 1 gnd 2 c boost c boost c app - + - + 5 . 1 2 boost notes: c boost is 16 pf c app is application specific all other capacitors are 47 nf ceramic il610 single-phase power control the fail-safe output (logic high output for zero coil current) of il600 isolators ensures power fets will be off on power-up. t he il600 inputs can be configured for inverting or non- inverting operation (see applications information). gnd v dd2 gnd c boost 3 2 5 6 7 8 47 nf 2 1 - + il610 v o 16 pf r x (+10v) _ isolated rs-232 receiver using il610 an il610 can be used as a simple isolated rs-232 receiver. cabling is greatly simplif ied by eliminating the need to power the input side of the receiving board . a similar circuit can be used for rs-422/rs- 485, lvds, or other differential networks. the il610-1 is a unique msop isolator when board space is criti cal. older rs-232 nodes may not ha ve the required 5 ma drive capability required by the il610. notes: c boost is 16pf ceramic c1 and c2 are 47 nf ceramic
il600 series 17 package drawings, dimensions and specifications 8-pin msop 0.114 (2.90) 0.114 (2.90) 0.016 (0.40) 0.005 (0.13) 0.009 (0.23) 0.027 (0.70) 0.010 (0.25) 0.028 (0.70) 0.002 (0.05) 0.043 (1.10) 0.032 (0.80) 0.006 (0.15) 0.016 (0.40) 0.024 (0.60) 0.189 (4.80) 0.197 (5.00) 0.122 (3.10) 0.122 (3.10) 6? 0? pin spacing is a basic dimension; tolerances do not accumulate note: 8-pin soic package 0.013 (0.33) 0.020 (0.50) 0.189 (4.8) 0.197 (5.0) 0.150 (3.8) 0.157 (4.0) dimensions in inches (mm) 3 2 1 0.228 (5.8) 0.244 (6.2) 0.008 (0.19) 0.010 (0.25) 0.010 (0.25) 0.020 (0.50) x45o 0o 8o 0.016 (0.40) 0.050 (1.27) 0.040 (1.0) 0.060 (1.5) 0.054 (1.37) 0.069 (1.75) 0.004 (0.10) 0.010 (0.25) pin spacing is a basic dimension; tolerances do not accumulate note: 8-pin pdip 0.36 (9.0) 0.40 (10.2) pin spacing is a basic dimension; tolerances do not accumulate note: 0.24 (6.1) 0.26 (6.6) 0.29 (6.4) 0.31 (7.9) 0.30 (7.6) 0.37 (9.4) 0.008 (0.2) 0.015 (0.4) 0.030 (0.76) 0.045 (1.14) 0.015 (0.38) 0.023 (0.58) 0.045 (1.14) 0.065 (1.65) 0.09 (2.3) 0.11 (2.8) 0.015 (0.38) 0.035 (0.89) 0.12 (3.05) 0.15 (3.81)
il600 series 18 0.15" 16-pin soic package 0.054 (1.4) 0.072 (1.8) 0.040 (1.0) 0.060 (1.5) 0.016 (0.4) 0.050 (1.3) 0.386 (9.8) 0.394 (10.0) pin 1 identified by either an indent or a marked dot nom 0.228 (5.8) 0.244 (6.2) 0.152 (3.86) 0.157 (3.99) dimensions in inches (mm) 0.007 (0.2) 0.013 (0.3) 0.004 (0.1) 0.012 (0.3) 0.040 (1.02) 0.050 (1.27) 0.013 (0.3) 0.020 (0.5) pin spacing is a basic dimension; tolerances do not accumulate note: 0.3" 16-pin soic package nom pin 1 identified by either an indent or a marked dot 0.287 (7.29) 0.300 (7.62) dimensions in inches (mm) 0.08 (2.0) 0.10 (2.5) 0.092 (2.34) 0.105 (2.67) 0.397 (10.1) 0.413 (10.5) 0.013 (0.3) 0.020 (0.5) 0.394 (10.00) 0.419 (10.64) 0.040 (1.0) 0.060 (1.5) 0.004 (0.1) 0.012 (0.3) 0.007 (0.2) 0.013 (0.3) 0.016 (0.4) 0.050 (1.3) pin spacing is a basic dimension; tolerances do not accumulate note:
il600 series 19 ordering information and valid part numbers bulk packaging blank = tube tr7 = 7'' tape and reel tr13 = 13'' tape and reel package e = rohs compliant package type blank = 0.3" soic -1 = msop -2 = pdip -3 = 0.15'' soic -5 = bare die base part number 610 = single channel 611 = 2 drive channels 612 = 1 drive channel, 1 receive channel 613 = 3 drive channels 614 = 2 drive channels, 1 receive channel product family il = isolators il610 valid part numbers IL610-1E il610-2e il610-3e il610-5 il611 valid part numbers il611-1e il611-2e il611-3e il612 valid part numbers il612-2e il612-3e il613 valid part numbers il613e il613-3e il614 valid part numbers il614e il614-3e all msop and soic part types are available on tape and reel. rohs compliant
il600 series 20 revision history isb-ds-001-il600-v september 2010 changes ? additional changes to pin spacing specification on msop drawing. isb-ds-001-il600-u changes ? changed pin spacing specification on msop drawing. isb-ds-001-il600-t changes ? added typical jitter specification at 5v. isb-ds-001-il600-s changes ? p. 2?deleted msop iec61010 approval. isb-ds-001-il600-r changes ? added emc details. isb-ds-001-il600-q changes ? iec 61010 approval for msop versions. isb-ds-001-il600-p changes ? specified coil resistance as typical only. ? revised section on calcula ting limiting resistors. isb-ds-001-il600-o changes ? note on all package drawings that pin-spacing tolerances are non-accumulating; change msop pin-spacing dimensions and tolerance accordingly. isb-ds-001-il600-n changes ? changed lower limit of length on pdip package drawing. isb-ds-001-il600-m changes ? changed ordering information to reflect that devices are now fully rohs compliant with no exemptions. isb-ds-001-il600-l changes ? added differential drive specifications ? eliminated soldering profile chart isb-ds-001-il600-k changes ? changed il485 transceiver isb-ds-001-il600-j changes ? added enhanced failsafe specification ? repaginated
il600 series 21 about nve an iso 9001 certified company nve corporation manufactures innovative products based on uni que spintronic giant magnetoresistive (gmr) technology. products include magnetic field sensors, magnetic field gradie nt sensors (gradiometers), digital magnetic field sensors, digital signal isolators, and isolated bus transceivers. nve pioneered spintronics and in 1994 introduced the world?s first products using gmr material, a line of ultra-precise magneti c sensors for position, magnetic media, gear speed and current sensing. nve corporation 11409 valley view road eden prairie, mn 55344-3617 usa telephone: (952) 829-9217 fax: (952) 829-9189 internet: www.nve.com e-mail: isoinfo@nve.com the information provided by nve corpor ation is believed to be accurate. however, no responsibility is assumed by nve corporation for its use, nor for any infringement of patents, nor rights or licenses granted to third parties, which may result from its use. no license is granted by implication, or otherwise, under any patent or patent rights of nve corporation. nve corporation does not authorize, nor warrant , any nve corporation product for use in life support devices or systems or other critical applications, without the express written appr oval of the president of nve corporation. specifications are subject to change without notice. isb-ds-001-il600-v september 2010

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